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taitep 5919041f07 actually no NOW the memory interface is "done"
2025-09-27 17:48:56 +02:00
src
actually no NOW the memory interface is "done"
2025-09-27 17:48:56 +02:00
.gitignore
Initial stuff and memory implementation
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Cargo.lock
Initial stuff and memory implementation
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Cargo.toml
Initial stuff and memory implementation
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LICENSE
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README.md
Initial Readme
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README.md

rvem

RISC-V Emulator. The goal is to support at least RV64GC and be able to run Linux, potentially more. No plans for RV32I or RV32/64E.

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Description
taitep's RISC-V Emulator
Readme MIT 52 KiB
Languages
Rust 100%