Commit Graph

109 Commits

Author SHA1 Message Date
5cbaf2dc66 Implement BGEU 2025-12-22 20:08:16 +01:00
ae57cdc691 Improve the debug messages when invalid instructions are found 2025-12-22 19:57:33 +01:00
bac68d7118 Pull out memory access instructions from rvi.rs to their own file 2025-12-22 19:51:21 +01:00
8cce960b29 Implement SW 2025-12-22 19:44:37 +01:00
cb100e92ac Implement SUB 2025-12-22 19:33:40 +01:00
d0d3775b88 Implement OR 2025-12-22 19:29:31 +01:00
1ddda6614a Implement AND and improve formatting and ordering in rvi.rs 2025-12-22 19:25:19 +01:00
ff161a69e6 Implement ADD 2025-12-22 19:19:19 +01:00
e00103375d Fix page offset miscalculation in instruction fetch 2025-12-22 18:28:31 +01:00
7177633477 WHY WAS I USING S-TYPE IMMEDIATE IN LD (also add some more debugging info on an exception) 2025-12-22 18:00:15 +01:00
48477bd8b1 Make echo.S compatible with the C-compatible linker script 2025-12-21 22:51:29 +01:00
24dcf5d5bd Improve UART by using nonblocking stdin 2025-12-21 21:25:29 +01:00
209e44ae64 Implement LD and BNE 2025-12-21 21:00:25 +01:00
5b2d6a1af0 Fix memory size in link.ld 2025-12-21 20:04:06 +01:00
a2d4dec417 Add some stuff to help with using C in link.ld 2025-12-21 19:38:32 +01:00
6c39a5eef2 Implement JALR, fix JAL, change how some stuff in instructions.rs is expressed 2025-12-21 19:36:25 +01:00
944ed573c6 Switch the current binary to use anyhow errors and add a proper argument number check 2025-12-21 19:06:23 +01:00
2e1c0a7dce Implement AUIPC 2025-12-21 19:01:02 +01:00
5c132b55e9 Fix assembly syntax in echo program 2025-12-21 17:56:40 +01:00
c10e1ec09b Allow other image file names through cli args, increase ram size, update readme 2025-12-21 17:49:02 +01:00
25dd685345 Add a linker script and example uart echo program 2025-12-21 17:04:18 +01:00
c05ba60c3c Implement ANDI and BEQ 2025-12-21 16:29:28 +01:00
acc267a460 Remove unused imports from the UART implementation 2025-12-21 16:01:39 +01:00
25c3b9f5e2 Make a dedicated function for advancing the PC by one instruction 2025-12-21 16:00:54 +01:00
390a2b3228 Implement LB and LBU 2025-12-21 15:56:50 +01:00
25ecfca912 Make the UART not constantly flush output 2025-12-21 15:45:32 +01:00
0457530e0c Add a basic UART (very much temporary, its performance is most likely horrible 2025-12-21 15:27:39 +01:00
eec40b069a Implement SB 2025-12-21 14:24:20 +01:00
e910036058 Fix sd address calculation 2025-12-21 14:08:06 +01:00
049334ebdb Remove a debug print from SLLI 2025-12-21 14:02:20 +01:00
d03863f5a2 Implement SLLI and fix sign extension of immediates for I-type and S-type instructions 2025-12-21 14:00:47 +01:00
87e6d03dbd Set version to 0.0.0 2025-12-21 13:09:10 +01:00
00976cb7cd Add some stuff to the readme 2025-12-21 13:03:18 +01:00
e8da0fc396 Get rid of some useless warnings in main.rs 2025-12-21 12:56:22 +01:00
62c6f905ce Remove unneeded once_cell dependency 2025-12-21 12:49:15 +01:00
c74b4a21d2 Add decode functions for immediate shifts (funct6 and imm_shamt), make decode functions not use references, add inline hints to decode functions 2025-12-21 12:47:56 +01:00
23647ae966 Add JAL and change some of the formatting on previous instructions to be cleaner 2025-12-21 12:20:30 +01:00
ac9506a1a7 (BIG CHANGE) Switch instruction identification/execution to use a plain match tree, should improve performance by quite a bit 2025-12-21 12:07:12 +01:00
e2d521bbe7 Add license/copyright notices to top of each source file (where applicable) 2025-12-01 22:06:13 +01:00
6b49b34cc5 rename to TRVE 2025-11-18 20:58:49 +01:00
9c4e2d17a2 Add support for addiw and lui 2025-10-21 14:46:02 +02:00
19568f855e Add a todo 2025-10-14 18:22:09 +02:00
7a519924cb Move funct3 values to rvi.rs instead of being in opcodes.rs 2025-10-14 18:21:28 +02:00
6bd31e73fb some debugging stuff and SECOND OPCODE! 2025-10-10 19:01:04 +02:00
bf5562df54 Make fields of DeviceEntry public 2025-10-09 20:27:20 +02:00
5274828b81 Make some constants and type aliases public 2025-10-09 20:26:09 +02:00
ee5f5a2ec4 FIRST INSTRUCTION WORKING 2025-10-07 20:23:59 +02:00
361b36fbd1 Make sure unsupported/illegal instructions are caught 2025-10-07 20:16:27 +02:00
dbd022f9c9 Make fields and register access functions of Core accessible to the rest of the emulator 2025-10-07 20:12:09 +02:00
908be749ac Make fields of MemConfig public to allow creating one 2025-10-07 17:04:20 +02:00