Commit Graph

13 Commits

Author SHA1 Message Date
5c008bfc04 Add exception values (what will go in mtval/stval) 2025-12-27 21:33:39 +01:00
970c1adcb0 Add checks to make sure that ram has a size that is a multiple of 8 2025-12-27 20:52:32 +01:00
6a3920895b Relicense to BSD 2-Clause to align better with the RISC-V community 2025-12-27 12:44:55 +01:00
528b519ce9 (BIG CHANGE) memory handling has changed, MMIO is now a 2 level page table, misaligned access supported, addresses not internally split to page and offset immediately, all load/store instructions implemented. Might still have bugs 2025-12-26 14:20:27 +01:00
66c63ab63c Add a default implementation for the memory device interface that just returns access faults 2025-12-24 14:06:16 +01:00
09d9064372 EXCEPTION SYSTEM (initial version - may change later) 2025-12-24 13:56:41 +01:00
e2d521bbe7 Add license/copyright notices to top of each source file (where applicable) 2025-12-01 22:06:13 +01:00
bf5562df54 Make fields of DeviceEntry public 2025-10-09 20:27:20 +02:00
5274828b81 Make some constants and type aliases public 2025-10-09 20:26:09 +02:00
908be749ac Make fields of MemConfig public to allow creating one 2025-10-07 17:04:20 +02:00
f5ac1a132f Allow identification of the type of memory (ram or mmio) backing a specific page 2025-09-28 21:13:29 +02:00
5919041f07 actually no NOW the memory interface is "done" 2025-09-27 17:48:56 +02:00
4a2272ae49 Initial stuff and memory implementation 2025-09-27 16:38:06 +02:00