Implement LD and BNE

This commit is contained in:
2025-12-21 21:00:25 +01:00
parent 5b2d6a1af0
commit 209e44ae64
2 changed files with 32 additions and 0 deletions

View File

@@ -35,11 +35,13 @@ pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option<Instr
// LOAD // LOAD
0b000 => Some(rvi::lb(core, instr)), 0b000 => Some(rvi::lb(core, instr)),
0b100 => Some(rvi::lbu(core, instr)), 0b100 => Some(rvi::lbu(core, instr)),
0b011 => Some(rvi::ld(core, instr)),
_ => None, _ => None,
}, },
0b11000 => match instr.funct3() { 0b11000 => match instr.funct3() {
// BRANCH // BRANCH
0b000 => Some(rvi::beq(core, instr)), 0b000 => Some(rvi::beq(core, instr)),
0b001 => Some(rvi::bne(core, instr)),
_ => None, _ => None,
}, },
0b01101 => Some(rvi::lui(core, instr)), 0b01101 => Some(rvi::lui(core, instr)),

View File

@@ -61,6 +61,26 @@ pub fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
} }
} }
pub fn ld(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
return InstructionResult::Exception(());
}
let page = (addr / 4096) as PageNum;
let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
match core.mem.read_dword(page, offset) {
Ok(x) => {
core.reg_write(instr.rd(), x);
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn sb(core: &mut Core, instr: Instruction) -> InstructionResult { pub fn sb(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s()); let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
@@ -145,6 +165,16 @@ pub fn beq(core: &mut Core, instr: Instruction) -> InstructionResult {
InstructionResult::Normal InstructionResult::Normal
} }
pub fn bne(core: &mut Core, instr: Instruction) -> InstructionResult {
if core.reg_read(instr.rs1()) != core.reg_read(instr.rs2()) {
core.pc = core.pc.wrapping_add(instr.imm_b());
} else {
core.advance_pc();
}
InstructionResult::Normal
}
pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult { pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
core.reg_write(instr.rd(), core.reg_read(instr.rs1()) << instr.imm_shamt()); core.reg_write(instr.rd(), core.reg_read(instr.rs1()) << instr.imm_shamt());