Implement AND and improve formatting and ordering in rvi.rs
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@@ -26,27 +26,35 @@ pub fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
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instr.rd(),
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core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()),
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);
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core.advance_pc();
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InstructionResult::Normal
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}
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pub fn addiw(core: &mut Core, instr: Instruction) -> InstructionResult {
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let res = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()) as i32;
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core.reg_write(instr.rd(), res as i64 as u64);
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core.advance_pc();
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InstructionResult::Normal
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}
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pub fn and(core: &mut Core, instr: Instruction) -> InstructionResult {
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core.reg_write(
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instr.rd(),
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core.reg_read(instr.rs1()) & core.reg_read(instr.rs2()),
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);
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core.advance_pc();
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InstructionResult::Normal
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}
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pub fn andi(core: &mut Core, instr: Instruction) -> InstructionResult {
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core.reg_write(instr.rd(), core.reg_read(instr.rs1()) & instr.imm_i());
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core.advance_pc();
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InstructionResult::Normal
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}
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pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
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core.reg_write(instr.rd(), core.reg_read(instr.rs1()) << instr.imm_shamt());
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core.advance_pc();
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InstructionResult::Normal
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}
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@@ -184,11 +192,3 @@ pub fn bne(core: &mut Core, instr: Instruction) -> InstructionResult {
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InstructionResult::Normal
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}
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pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
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core.reg_write(instr.rd(), core.reg_read(instr.rs1()) << instr.imm_shamt());
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core.advance_pc();
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InstructionResult::Normal
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}
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