93 lines
2.2 KiB
Rust
93 lines
2.2 KiB
Rust
// Copyright (c) 2025 taitep
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// SPDX-License-Identifier: BSD-2-Clause
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//
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// This file is part of TRVE (https://gitea.taitep.se/taitep/trve)
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// See LICENSE file in the project root for full license text.
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use std::{path::PathBuf, sync::Arc, time::Duration};
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use clap::Parser;
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use trve::{
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consts::{Addr, Byte, DWord, HWord, Word},
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core::Core,
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exceptions::MemoryException,
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gdb,
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mem::{MemConfig, MemDeviceInterface, MmioRoot, Ram},
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};
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use anyhow::Result;
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use crate::basic_uart::BasicUart;
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mod execload;
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#[derive(Parser)]
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struct Args {
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executable: PathBuf,
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#[arg(long)]
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wait: bool,
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}
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fn main() -> Result<()> {
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let args = Args::parse();
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let mut ram = Ram::try_new(16 * 1024 * 1024)?;
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let buf = ram.buf_mut();
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let entry_point = execload::load(args.executable, buf)?;
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let mut mmio_root = MmioRoot::default();
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mmio_root.insert(0, Arc::new(DbgOut));
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let uart = BasicUart::new();
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let uart = uart.spawn_poller(Duration::from_millis(10));
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mmio_root.insert(0x10000, uart);
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let mem_cfg = MemConfig {
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ram: Arc::new(ram),
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mmio_root,
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};
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let (cmd_sender, cmd_reciever) = std::sync::mpsc::channel();
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gdb::run_stub(cmd_sender.clone());
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let mut core = Core::new(mem_cfg, cmd_reciever);
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core.reset(entry_point);
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if args.wait {
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core.run_waiting_for_cmd();
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} else {
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core.run();
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}
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Ok(())
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}
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mod basic_uart;
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struct DbgOut;
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impl MemDeviceInterface for DbgOut {
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fn write_dword(&self, addr: Addr, value: DWord) -> Result<(), MemoryException> {
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eprintln!("Wrote DWord {value:016x} to Debug-Out address {addr:x}");
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Ok(())
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}
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fn write_word(&self, addr: Addr, value: Word) -> Result<(), MemoryException> {
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eprintln!("Wrote Word {value:08x} to Debug-Out address {addr:x}");
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Ok(())
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}
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fn write_hword(&self, addr: Addr, value: HWord) -> Result<(), MemoryException> {
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eprintln!("Wrote HWord {value:04x} to Debug-Out address {addr:x}");
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Ok(())
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}
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fn write_byte(&self, addr: Addr, value: Byte) -> Result<(), MemoryException> {
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eprintln!("Wrote Byte {value:02x} to Debug-Out address {addr:x}");
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Ok(())
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}
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}
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