// Copyright (c) 2025 taitep
// SPDX-License-Identifier: BSD-2-Clause
//
// This file is part of TRVE (https://gitea.taitep.se/taitep/trve)
// See LICENSE file in the project root for full license text.

const MASK_REGISTER: u32 = 0x1f;

#[derive(Clone, Copy)]
pub struct Instruction(pub u32);

impl std::fmt::Debug for Instruction {
    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
        f.write_fmt(format_args!("{:08x}", self.0))
    }
}

#[allow(dead_code)]
impl Instruction {
    #[inline]
    pub fn opcode(self) -> u8 {
        (self.0 & 0x7f) as u8
    }

    /// Returns the opcode of the instruction, with the last 2 bits stripped away, as they are always 0b11 in a non-compressed instruction
    #[inline]
    pub fn opcode_noncompressed(self) -> u8 {
        debug_assert_eq!(self.0 & 0b11, 0b11, "Compressed (or invalid) opcode");
        (self.0 >> 2 & 0x1f) as u8
    }

    #[inline]
    pub fn rd(self) -> u8 {
        (self.0 >> 7 & MASK_REGISTER) as u8
    }

    #[inline]
    pub fn funct3(self) -> u8 {
        (self.0 >> 12 & 0x7) as u8
    }

    #[inline]
    pub fn rs1(self) -> u8 {
        (self.0 >> 15 & MASK_REGISTER) as u8
    }

    #[inline]
    pub fn rs2(self) -> u8 {
        (self.0 >> 20 & MASK_REGISTER) as u8
    }

    #[inline]
    pub fn funct7(self) -> u8 {
        (self.0 >> 25 & 0x7f) as u8
    }

    #[inline]
    pub fn imm_i(self) -> u64 {
        (self.0 as i32 as i64 >> 20) as u64
    }

    #[inline]
    pub fn imm_s(self) -> u64 {
        let imm_11_5 = (self.0 as i32 as i64 >> 25 << 5) as u64;
        let imm_4_0 = (self.0 >> 7 & 0x1f) as u64;
        imm_11_5 | imm_4_0
    }

    #[inline]
    pub fn imm_b(self) -> u64 {
        let imm_12 = ((self.0 & 0x8000_0000) as i32 as i64 >> (31 - 12)) as u64;
        let imm_10_5 = ((self.0 >> 25 & 0x3f) << 5) as u64;
        let imm_4_1 = ((self.0 >> 8 & 0xf) << 1) as u64;
        let imm_11 = ((self.0 >> 7 & 1) << 11) as u64;

        imm_12 | imm_10_5 | imm_4_1 | imm_11
    }

    #[inline]
    pub fn imm_u(self) -> u64 {
        (self.0 & 0xffff_f000) as i32 as i64 as u64
    }

    #[inline]
    pub fn imm_j(self) -> u64 {
        let imm_20 = ((self.0 & 0x8000_0000) as i32 as i64 >> (31 - 20)) as u64;
        let imm_10_1 = ((self.0 >> 21 & 0x3ff) << 1) as u64;
        let imm_11 = ((self.0 >> 20 & 1) << 11) as u64;
        let imm_19_12 = ((self.0 >> 12 & 0xff) << 12) as u64;

        imm_20 | imm_10_1 | imm_11 | imm_19_12
    }

    /// Technically part of immediate. Only used to determine shift type for immediate shifts afaik
    /// 32bit ones use funct7 in this way
    #[inline]
    pub fn funct6(self) -> u8 {
        (self.0 >> 26 & 0x3f) as u8
    }

    /// Mostly/only used for the SYSTEM opcode
    pub fn funct12(self) -> u16 {
        (self.0 >> 20) as u16
    }
}