Comment out the unused 'Pause' instruction result

src/core.rs

@@ -17,7 +17,7 @@ pub(crate) type Exception = ();
 pub(crate) enum InstructionResult {
     Normal,
     Exception(Exception),
-    Pause,
+    // Pause,
 }
 
 pub struct Core {
@@ -72,11 +72,10 @@ impl Core {
                         eprintln!("Exception from instruction");
                         eprintln!("PC: {:016x}, instr: {:08x}", self.pc, instr.0);
                         break;
-                    }
+                    } // InstructionResult::Pause => {
-                    InstructionResult::Pause => {
+                      //     eprintln!("Instruction asked for pause");
-                        eprintln!("Instruction asked for pause");
+                      //     break;
-                        break;
+                      // }
-                    }
                 }
             } else {
                 eprintln!("Invalid Instruction {:08x} at PC: {:x}", instr.0, self.pc);

src/instructions.rs

@@ -25,6 +25,11 @@ pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option<Instr
             // OP_IMM
             0b000 => Some(rvi::addi(core, instr)),
             0b001 => (instr.funct6() == 0).then(|| rvi::slli(core, instr)),
+            0b101 => match instr.funct6() {
+                // immediate right-shift
+                0b000000 => Some(rvi::srli(core, instr)),
+                _ => None,
+            },
             0b111 => Some(rvi::andi(core, instr)),
             _ => None,
         },
@@ -36,6 +41,7 @@ pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option<Instr
         0b01000 => match instr.funct3() {
             // STORE
             0b000 => Some(rvi::sb(core, instr)),
+            0b001 => Some(rvi::sh(core, instr)),
             0b010 => Some(rvi::sw(core, instr)),
             0b011 => Some(rvi::sd(core, instr)),
             _ => None,

src/instructions/rvi.rs

@@ -79,6 +79,12 @@ pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
     InstructionResult::Normal
 }
 
+pub fn srli(core: &mut Core, instr: Instruction) -> InstructionResult {
+    core.reg_write(instr.rd(), core.reg_read(instr.rs1()) >> instr.imm_shamt());
+    core.advance_pc();
+    InstructionResult::Normal
+}
+
 pub fn lui(core: &mut Core, instr: Instruction) -> InstructionResult {
     core.reg_write(instr.rd(), instr.imm_u());
     core.advance_pc();

src/instructions/rvi/mem.rs

@@ -86,6 +86,26 @@ pub fn lw(core: &mut Core, instr: Instruction) -> InstructionResult {
     }
 }
 
+pub fn sh(core: &mut Core, instr: Instruction) -> InstructionResult {
+    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
+
+    if !addr.is_multiple_of(std::mem::size_of::<HWord>() as Addr) {
+        return InstructionResult::Exception(());
+    }
+
+    let page = (addr / 4096) as PageNum;
+    let offset = (addr / 2 & ((4096 / 2 as Addr) - 1)) as u16;
+    let value = core.reg_read(instr.rs2()) as HWord;
+
+    match core.mem.write_hword(page, offset, value) {
+        Ok(_) => {
+            core.advance_pc();
+            InstructionResult::Normal
+        }
+        Err(_) => InstructionResult::Exception(()),
+    }
+}
+
 pub fn lh(core: &mut Core, instr: Instruction) -> InstructionResult {
     let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());