Pull out memory access instructions from rvi.rs to their own file

src/core.rs

@@ -38,7 +38,7 @@ impl Core {
     pub fn run(&mut self) {
         loop {
             let page = (self.pc / 4096) as usize;
-            let offset = (self.pc / 4) as u16;
+            let offset = (self.pc % 4096 / 4) as u16;
             if !self.pc.is_multiple_of(4) {
                 //replace eprint with logging, replace break with exception
                 eprintln!("PC not aligned");
@@ -64,6 +64,7 @@ impl Core {
                     InstructionResult::Normal => {}
                     InstructionResult::Exception(_e) => {
                         eprintln!("Exception from instruction");
+                        eprintln!("PC: {:016X}, instr: {:08X}", self.pc, instr.0);
                         break;
                     }
                     InstructionResult::Pause => {

src/instructions.rs

@@ -13,6 +13,14 @@ use crate::{
 
 pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option<InstructionResult> {
     match instr.opcode_noncompressed() {
+        0b01100 => match (instr.funct7(), instr.funct3()) {
+            // OP
+            (0b0000000, 0b000) => Some(rvi::add(core, instr)),
+            (0b0100000, 0b000) => Some(rvi::sub(core, instr)),
+            (0b0000000, 0b111) => Some(rvi::and(core, instr)),
+            (0b0000000, 0b110) => Some(rvi::or(core, instr)),
+            _ => None,
+        },
         0b00100 => match instr.funct3() {
             // OP_IMM
             0b000 => Some(rvi::addi(core, instr)),
@@ -28,6 +36,7 @@ pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option<Instr
         0b01000 => match instr.funct3() {
             // STORE
             0b000 => Some(rvi::sb(core, instr)),
+            0b010 => Some(rvi::sw(core, instr)),
             0b011 => Some(rvi::sd(core, instr)),
             _ => None,
         },

src/instructions/rvi.rs

@@ -5,130 +5,78 @@
 // See LICENSE file in the project root for full license text.
 
 use crate::{
-    consts::{Addr, DWord},
     core::{Core, InstructionResult},
     decode::Instruction,
-    mem::PageNum,
 };
 
+mod mem;
+
+pub use mem::*;
+
+pub fn add(core: &mut Core, instr: Instruction) -> InstructionResult {
+    core.reg_write(
+        instr.rd(),
+        core.reg_read(instr.rs1())
+            .wrapping_add(core.reg_read(instr.rs2())),
+    );
+    core.advance_pc();
+    InstructionResult::Normal
+}
+
+pub fn sub(core: &mut Core, instr: Instruction) -> InstructionResult {
+    core.reg_write(
+        instr.rd(),
+        core.reg_read(instr.rs1())
+            .wrapping_sub(core.reg_read(instr.rs2())),
+    );
+    core.advance_pc();
+    InstructionResult::Normal
+}
+
 pub fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
     core.reg_write(
         instr.rd(),
         core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()),
     );
-
     core.advance_pc();
-
     InstructionResult::Normal
 }
 
 pub fn addiw(core: &mut Core, instr: Instruction) -> InstructionResult {
     let res = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()) as i32;
-
     core.reg_write(instr.rd(), res as i64 as u64);
-
     core.advance_pc();
+    InstructionResult::Normal
+}
 
+pub fn and(core: &mut Core, instr: Instruction) -> InstructionResult {
+    core.reg_write(
+        instr.rd(),
+        core.reg_read(instr.rs1()) & core.reg_read(instr.rs2()),
+    );
+    core.advance_pc();
     InstructionResult::Normal
 }
 
 pub fn andi(core: &mut Core, instr: Instruction) -> InstructionResult {
     core.reg_write(instr.rd(), core.reg_read(instr.rs1()) & instr.imm_i());
-
     core.advance_pc();
-
     InstructionResult::Normal
 }
 
-// TODO: Support misaligned memory access
-pub fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
-    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
-
-    if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
-        return InstructionResult::Exception(());
-    }
-
-    let page = (addr / 4096) as PageNum;
-    let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
-    let value = core.reg_read(instr.rs2());
-
-    match core.mem.write_dword(page, offset, value) {
-        Ok(_) => {
+pub fn or(core: &mut Core, instr: Instruction) -> InstructionResult {
+    core.reg_write(
+        instr.rd(),
+        core.reg_read(instr.rs1()) | core.reg_read(instr.rs2()),
+    );
     core.advance_pc();
     InstructionResult::Normal
-        }
-        Err(_) => InstructionResult::Exception(()),
-    }
 }
 
-pub fn ld(core: &mut Core, instr: Instruction) -> InstructionResult {
-    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
-
-    if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
-        return InstructionResult::Exception(());
-    }
-
-    let page = (addr / 4096) as PageNum;
-    let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
-
-    match core.mem.read_dword(page, offset) {
-        Ok(x) => {
-            core.reg_write(instr.rd(), x);
+pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
+    core.reg_write(instr.rd(), core.reg_read(instr.rs1()) << instr.imm_shamt());
     core.advance_pc();
     InstructionResult::Normal
-        }
-        Err(_) => InstructionResult::Exception(()),
-    }
-}
-
-pub fn sb(core: &mut Core, instr: Instruction) -> InstructionResult {
-    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
-
-    let page = (addr / 4096) as PageNum;
-    let offset = (addr & (4096 as Addr - 1)) as u16;
-    let value = core.reg_read(instr.rs2()) as u8;
-
-    match core.mem.write_byte(page, offset, value) {
-        Ok(_) => {
-            core.advance_pc();
-            InstructionResult::Normal
-        }
-        Err(_) => InstructionResult::Exception(()),
-    }
-}
-
-pub fn lb(core: &mut Core, instr: Instruction) -> InstructionResult {
-    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
-
-    let page = (addr / 4096) as PageNum;
-    let offset = (addr & (4096 as Addr - 1)) as u16;
-
-    match core.mem.read_byte(page, offset) {
-        Ok(x) => {
-            let x = x as i8 as i64 as DWord;
-            core.reg_write(instr.rd(), x);
-            core.advance_pc();
-            InstructionResult::Normal
-        }
-        Err(_) => InstructionResult::Exception(()),
-    }
-}
-
-pub fn lbu(core: &mut Core, instr: Instruction) -> InstructionResult {
-    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
-
-    let page = (addr / 4096) as PageNum;
-    let offset = (addr & (4096 as Addr - 1)) as u16;
-
-    match core.mem.read_byte(page, offset) {
-        Ok(x) => {
-            let x = x as DWord;
-            core.reg_write(instr.rd(), x);
-            core.advance_pc();
-            InstructionResult::Normal
-        }
-        Err(_) => InstructionResult::Exception(()),
-    }
 }
 
 pub fn lui(core: &mut Core, instr: Instruction) -> InstructionResult {
@@ -174,11 +122,3 @@ pub fn bne(core: &mut Core, instr: Instruction) -> InstructionResult {
 
     InstructionResult::Normal
 }
-
-pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
-    core.reg_write(instr.rd(), core.reg_read(instr.rs1()) << instr.imm_shamt());
-
-    core.advance_pc();
-
-    InstructionResult::Normal
-}

src/instructions/rvi/mem.rs

@@ -0,0 +1,117 @@
+use crate::{
+    consts::{Addr, Byte, DWord, Word},
+    core::Core,
+    instructions::{Instruction, InstructionResult},
+    mem::PageNum,
+};
+
+// TODO: Support misaligned memory access
+pub fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
+    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
+
+    if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
+        return InstructionResult::Exception(());
+    }
+
+    let page = (addr / 4096) as PageNum;
+    let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
+    let value = core.reg_read(instr.rs2());
+
+    match core.mem.write_dword(page, offset, value) {
+        Ok(_) => {
+            core.advance_pc();
+            InstructionResult::Normal
+        }
+        Err(_) => InstructionResult::Exception(()),
+    }
+}
+
+pub fn ld(core: &mut Core, instr: Instruction) -> InstructionResult {
+    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
+
+    if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
+        return InstructionResult::Exception(());
+    }
+
+    let page = (addr / 4096) as PageNum;
+    let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
+
+    match core.mem.read_dword(page, offset) {
+        Ok(x) => {
+            core.reg_write(instr.rd(), x);
+            core.advance_pc();
+            InstructionResult::Normal
+        }
+        Err(_) => InstructionResult::Exception(()),
+    }
+}
+
+pub fn sw(core: &mut Core, instr: Instruction) -> InstructionResult {
+    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
+
+    if !addr.is_multiple_of(std::mem::size_of::<Word>() as Addr) {
+        return InstructionResult::Exception(());
+    }
+
+    let page = (addr / 4096) as PageNum;
+    let offset = (addr / 4 & ((4096 / 4 as Addr) - 1)) as u16;
+    let value = core.reg_read(instr.rs2()) as Word;
+
+    match core.mem.write_word(page, offset, value) {
+        Ok(_) => {
+            core.advance_pc();
+            InstructionResult::Normal
+        }
+        Err(_) => InstructionResult::Exception(()),
+    }
+}
+
+pub fn sb(core: &mut Core, instr: Instruction) -> InstructionResult {
+    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
+
+    let page = (addr / 4096) as PageNum;
+    let offset = (addr & (4096 as Addr - 1)) as u16;
+    let value = core.reg_read(instr.rs2()) as Byte;
+
+    match core.mem.write_byte(page, offset, value) {
+        Ok(_) => {
+            core.advance_pc();
+            InstructionResult::Normal
+        }
+        Err(_) => InstructionResult::Exception(()),
+    }
+}
+
+pub fn lb(core: &mut Core, instr: Instruction) -> InstructionResult {
+    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
+
+    let page = (addr / 4096) as PageNum;
+    let offset = (addr & (4096 as Addr - 1)) as u16;
+
+    match core.mem.read_byte(page, offset) {
+        Ok(x) => {
+            let x = x as i8 as i64 as DWord;
+            core.reg_write(instr.rd(), x);
+            core.advance_pc();
+            InstructionResult::Normal
+        }
+        Err(_) => InstructionResult::Exception(()),
+    }
+}
+
+pub fn lbu(core: &mut Core, instr: Instruction) -> InstructionResult {
+    let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
+
+    let page = (addr / 4096) as PageNum;
+    let offset = (addr & (4096 as Addr - 1)) as u16;
+
+    match core.mem.read_byte(page, offset) {
+        Ok(x) => {
+            let x = x as DWord;
+            core.reg_write(instr.rd(), x);
+            core.advance_pc();
+            InstructionResult::Normal
+        }
+        Err(_) => InstructionResult::Exception(()),
+    }
+}