From eec40b069ad6cf8e91c358bf37b5518e4b0623ff Mon Sep 17 00:00:00 2001 From: taitep Date: Sun, 21 Dec 2025 14:24:20 +0100 Subject: [PATCH] Implement SB --- src/instructions.rs | 1 + src/instructions/rvi.rs | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/src/instructions.rs b/src/instructions.rs index fc270dc..5261dde 100644 --- a/src/instructions.rs +++ b/src/instructions.rs @@ -30,6 +30,7 @@ pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option match instr.funct3() { // STORE + 0b000 => Some(rvi::sb(core, instr)), 0b011 => Some(rvi::sd(core, instr)), _ => None, }, diff --git a/src/instructions/rvi.rs b/src/instructions/rvi.rs index 1fe1c7a..89d142b 100644 --- a/src/instructions/rvi.rs +++ b/src/instructions/rvi.rs @@ -53,6 +53,22 @@ pub fn sd(core: &mut Core, instr: Instruction) -> InstructionResult { } } +pub fn sb(core: &mut Core, instr: Instruction) -> InstructionResult { + let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s()); + + let page = (addr / 4096) as PageNum; + let offset = (addr & (4096 as Addr - 1)) as u16; + let value = core.reg_read(instr.rs2()) as u8; + + match core.mem.write_byte(page, offset, value) { + Ok(_) => { + core.pc = core.pc.wrapping_add(4); + InstructionResult::Normal + } + Err(_) => InstructionResult::Exception(()), + } +} + pub fn lui(core: &mut Core, instr: Instruction) -> InstructionResult { core.reg_write(instr.rd(), instr.imm_u()); core.pc = core.pc.wrapping_add(4);