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Pull out memory access instructions from rvi.rs to their own file

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taitep
2025-12-22 19:51:21 +01:00
parent 8cce960b29
commit bac68d7118
2 changed files with 121 additions and 113 deletions
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117
src/instructions/rvi.rs
View File

@@ -5,12 +5,14 @@
// See LICENSE file in the project root for full license text.
use crate::{
consts::{Addr, DWord, Word},
core::{Core, InstructionResult},
decode::Instruction,
mem::PageNum,
};
mod mem;
pub use mem::*;
pub fn add(core: &mut Core, instr: Instruction) -> InstructionResult {
core.reg_write(
instr.rd(),
@@ -77,117 +79,6 @@ pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
InstructionResult::Normal
}
// TODO: Support misaligned memory access
pub fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
return InstructionResult::Exception(());
}
let page = (addr / 4096) as PageNum;
let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
let value = core.reg_read(instr.rs2());
match core.mem.write_dword(page, offset, value) {
Ok(_) => {
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn ld(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
return InstructionResult::Exception(());
}
let page = (addr / 4096) as PageNum;
let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
match core.mem.read_dword(page, offset) {
Ok(x) => {
core.reg_write(instr.rd(), x);
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn sw(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
if !addr.is_multiple_of(std::mem::size_of::<Word>() as Addr) {
return InstructionResult::Exception(());
}
let page = (addr / 4096) as PageNum;
let offset = (addr / 4 & ((4096 / 4 as Addr) - 1)) as u16;
let value = core.reg_read(instr.rs2()) as Word;
match core.mem.write_word(page, offset, value) {
Ok(_) => {
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn sb(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
let page = (addr / 4096) as PageNum;
let offset = (addr & (4096 as Addr - 1)) as u16;
let value = core.reg_read(instr.rs2()) as u8;
match core.mem.write_byte(page, offset, value) {
Ok(_) => {
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn lb(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
let page = (addr / 4096) as PageNum;
let offset = (addr & (4096 as Addr - 1)) as u16;
match core.mem.read_byte(page, offset) {
Ok(x) => {
let x = x as i8 as i64 as DWord;
core.reg_write(instr.rd(), x);
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn lbu(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
let page = (addr / 4096) as PageNum;
let offset = (addr & (4096 as Addr - 1)) as u16;
match core.mem.read_byte(page, offset) {
Ok(x) => {
let x = x as DWord;
core.reg_write(instr.rd(), x);
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn lui(core: &mut Core, instr: Instruction) -> InstructionResult {
core.reg_write(instr.rd(), instr.imm_u());
core.advance_pc();

117
src/instructions/rvi/mem.rs Normal file
View File

@@ -0,0 +1,117 @@
use crate::{
consts::{Addr, Byte, DWord, Word},
core::Core,
instructions::{Instruction, InstructionResult},
mem::PageNum,
};
// TODO: Support misaligned memory access
pub fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
return InstructionResult::Exception(());
}
let page = (addr / 4096) as PageNum;
let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
let value = core.reg_read(instr.rs2());
match core.mem.write_dword(page, offset, value) {
Ok(_) => {
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn ld(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
return InstructionResult::Exception(());
}
let page = (addr / 4096) as PageNum;
let offset = (addr / 8 & ((4096 / 8 as Addr) - 1)) as u16;
match core.mem.read_dword(page, offset) {
Ok(x) => {
core.reg_write(instr.rd(), x);
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn sw(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
if !addr.is_multiple_of(std::mem::size_of::<Word>() as Addr) {
return InstructionResult::Exception(());
}
let page = (addr / 4096) as PageNum;
let offset = (addr / 4 & ((4096 / 4 as Addr) - 1)) as u16;
let value = core.reg_read(instr.rs2()) as Word;
match core.mem.write_word(page, offset, value) {
Ok(_) => {
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn sb(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
let page = (addr / 4096) as PageNum;
let offset = (addr & (4096 as Addr - 1)) as u16;
let value = core.reg_read(instr.rs2()) as Byte;
match core.mem.write_byte(page, offset, value) {
Ok(_) => {
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn lb(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
let page = (addr / 4096) as PageNum;
let offset = (addr & (4096 as Addr - 1)) as u16;
match core.mem.read_byte(page, offset) {
Ok(x) => {
let x = x as i8 as i64 as DWord;
core.reg_write(instr.rd(), x);
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}
pub fn lbu(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
let page = (addr / 4096) as PageNum;
let offset = (addr & (4096 as Addr - 1)) as u16;
match core.mem.read_byte(page, offset) {
Ok(x) => {
let x = x as DWord;
core.reg_write(instr.rd(), x);
core.advance_pc();
InstructionResult::Normal
}
Err(_) => InstructionResult::Exception(()),
}
}