Move funct3 values to rvi.rs instead of being in opcodes.rs
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@@ -1,10 +1,5 @@
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//! Includes opcodes, funct3 values, and match/mask values.
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//! Opcodes (unless compressed) have the last 2 bits stripped off as they are always 1s for non-compressed instructions.
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pub(super) const OP_IMM: u8 = 0b00100;
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pub(super) const FUNCT3_ADDI: u8 = 0b000;
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pub(super) const STORE: u8 = 0b01000;
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pub(super) const FUNCT3_SD: u8 = 0b011;
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@@ -5,18 +5,17 @@ use crate::{
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instructions::{
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OpcodeHandler,
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gen_tools::insert_funct3_splitter,
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opcodes::{FUNCT3_ADDI, FUNCT3_SD, OP_IMM, STORE},
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opcodes::{OP_IMM, STORE},
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},
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mem::PageNum,
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};
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pub(super) fn add_instrs(list: &mut [OpcodeHandler; 32]) {
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let funct3_split_op_imm = insert_funct3_splitter(&mut list[OP_IMM as usize].splitter);
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funct3_split_op_imm[FUNCT3_ADDI as usize].handler =
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Some(super::InstructionHandler { runner: addi });
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funct3_split_op_imm[0b000].handler = Some(super::InstructionHandler { runner: addi }); // ADDI
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let funct3_split_store = insert_funct3_splitter(&mut list[STORE as usize].splitter);
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funct3_split_store[FUNCT3_SD as usize].handler = Some(super::InstructionHandler { runner: sd })
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funct3_split_store[0b011].handler = Some(super::InstructionHandler { runner: sd }) // SD
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}
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fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
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