From 2b5eb96187c8aa67b5d43abf1917e7158620f2f8 Mon Sep 17 00:00:00 2001 From: taitep Date: Mon, 22 Dec 2025 21:17:38 +0100 Subject: [PATCH] Implement BLTU --- src/instructions.rs | 1 + src/instructions/rvi.rs | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/src/instructions.rs b/src/instructions.rs index c184065..4a7a627 100644 --- a/src/instructions.rs +++ b/src/instructions.rs @@ -52,6 +52,7 @@ pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option Some(rvi::beq(core, instr)), 0b001 => Some(rvi::bne(core, instr)), + 0b110 => Some(rvi::bltu(core, instr)), 0b111 => Some(rvi::bgeu(core, instr)), _ => None, }, diff --git a/src/instructions/rvi.rs b/src/instructions/rvi.rs index 6f7dfd2..7d57ce6 100644 --- a/src/instructions/rvi.rs +++ b/src/instructions/rvi.rs @@ -132,3 +132,13 @@ pub fn bgeu(core: &mut Core, instr: Instruction) -> InstructionResult { InstructionResult::Normal } + +pub fn bltu(core: &mut Core, instr: Instruction) -> InstructionResult { + if core.reg_read(instr.rs1()) < core.reg_read(instr.rs2()) { + core.pc = core.pc.wrapping_add(instr.imm_b()); + } else { + core.advance_pc(); + } + + InstructionResult::Normal +}